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推薦參考書：
- Digital System Design with VHDL
- Mark Zwolinski
ISBN 0-201-36063-2, Prentice
Hall
2000. 1st Edition, 336 pages
- 其他參考書：
-
- Real Chip Design and Verification Using Verilog and VHDL
- Ben Cohen
ISBN 0-9705394-2-8, VhdlCohen Publishing
November 2001, 420
pages. This book addresses the practical and real aspects of logic design,
processes, and verification. It incorporates a collection of FPGA and ASIC
design practices expressed with Verilog and VHDL. For book information/purchase
see http://www.vhdlcohen.com/.
- The Designer's Guide to VHDL, 2nd Edition
- Peter J. Ashenden
ISBN 1558606912, Morgan Kaufmann
Publishers
May 2001, 740 pages
- Component Design by Example ... a Step-by-Step Process Using VHDL with
UART as Vehicle
- Ben Cohen
ISBN 0-9705394-0-1, VhdlCohen Publishing
November 2000, 308
pages. Book uses a full featured UART with FIFO as a design vehicle to
demonstrate the front-end design processes including: Requirement Specification,
Architectural Plan, Verification Plan, Design and Synthesis, Design
Verification, Design Integration, Documentation & Delivery, and Process
Guidelines. Book provides helpful guides and templates for all front-end phases
of a design, most of which are independent of the HDL implementation or
verification languages. CD Includes Advanced Design of Parameterized UART with
Subblocks, FIFO Buffering, and Interrupt Controller, Reusable TextIO Parser
Package, Advanced Testbench Code with Client/Server Object Oriented Style and
Text Command Files, Design of Verifier with Error Detection and Transaction
Logging, EMACS Editor with T-shell for Windows NT, 9X, Standard VHDL Packages.
For book information/purchase see http://www.vhdlcohen.com
- Writing Testbenches: Functional Verification of HDL Models
- Janick Bergeron
ISBN 0-7923-7766-4
2000. Writing Testbenches:
Functional Verification of HDL Model is the first book ever devoted entirely to
the topic of verification and testbenches. It covers all the issues of a
verification process that aims for first-time success. http://janick.bergeron.com/wtb
- Digital Systems Design With Vhdl and Synthesis : An Integrated
Approach
- K. C. Chang
ISBN 0769500234, IEEE Computer Society Press
May 1999,
Hardcover - 516 pages
- VHDL Coding Styles and Methodologies, 2nd Edition
- Ben Cohen
ISBN 0-7923-8474-1, Kluwer Academic
Publishers
1999, 450 pages. Book emphasizes detailed application of the
language, style, methodologies, and synthesis through several complete examples.
This edition provides practical information on reusable software methodologies
for the design of bus functional models for testbenches. This includes the
waveform, client/server, command text and binary file methods. All VHDL code is
on CD. CD also includes the GNU toolsuite with EMACS language sensitive editor,
TSHELL, 30 day evaluation of ModelSim (Model Technology), and 20 day evaluation
of Synplify (Synplicity). For TOC see http://members.aol.com/vhdlcohen/vhdl
- Formal Semantics and Proof Techniques for Optimizing VHDL Models
- Kothanda Umamageswaran, Sheetanshu L. Pandey, et al.
ISBN 0792383753, Kluwer Academic Publishers
November 1998, 184 pages
- A VHDL Primer, Third Edition
- J. Bhasker
ISBN 0-13-096575-8, Prentice
Hall
September 1999, 375 pages, updated to cover the popular new IEEE
STD_LOGIC_1164 standard
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